| http://www.w3.org/ns/prov#value | - FIG. 2A is an electrical schematic diagram of an n-channel analog-valued MOSFET (metal oxide semiconductor field effect transistor) having a voltage input node, Vin, a capacitor, c, coupled between node Vin and a floating gate, FG, and an n-channel MOSFET having floating gate FG as its floating gate.
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