| http://www.w3.org/ns/prov#value | - It is well known in the art that various logic circuitry, such as row and column decoders and sense amplifiers, can be included in the array logic 54, and that the interface 55 may include one or more bit lines, gate lines, digit lines, control lines, word lines, and other communication paths to interconnect the memory cell array 52 with the array logic 54.
|
