| http://www.w3.org/ns/prov#value | - Referring to FIG. 6A, after the steps shown in FIG. 4B have been carried out, a passivation layer 47 having a thickness of about 3000-10000 angstroms is formed on the gate insulating layer 39 by depositing an insulating substance, such as silicon oxide, silicon nitride, or the like, to cover the active layer 41 by CVD. Then, a photoresist pattern 57 is formed by exposure and development after the
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