| http://www.w3.org/ns/prov#value | - electrically interconnecting the processors, memory and I/O circuitry so that each processor has electrical access to all of the memory and at least a portion of the I/O circuitry; using a software mechanism to divide the processors, memory and I/O circuitry into a plurality of partitions, each partition including at least one processor, a subset of the memory and a subset of the I/O circuitry; ru
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