| http://www.w3.org/ns/prov#value | - eeds said bus, including means for developing a two level signal and means for switching from a first level to a second level at said predetermined time. (5) said IOCC including,(a) arbiter means for controlling access to said I/O Bus by said co-processor and I/O units in accordance with a preestablished priority plan, said arbiter means including(i) circuit means connected to receive said two lev
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