| http://www.w3.org/ns/prov#value | - digital signal processing circuitry configured to perform arithmetic operations on data including first data indicative of an n-dimensional pattern p(x1, . . . , xn), and second data indicative of a separated-spline kernel k(x1, . . . , xn)=k1(x1) . . . kn(xn), where kj has circulant Kj, the kernel k(x1, . . . , xn) admits of an operator A=A1A2 . . .
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