| http://www.w3.org/ns/prov#value | - a first transistor and a second transistor having source-drain paths connected in series between a select signal node and a second power supply node, the source-drain paths having a common connection to a word line, the word line coupled to a plurality of memory cells; the first transistor formed in the first well including a gate coupled to a line select signal node, the second transistor includi
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