| http://www.w3.org/ns/prov#value | - a memory array comprising a plurality of floating gate transistors, each transistor including a gate connected to a word line, and a row of transistors connected to a same word line defining a page, said memory array being erasable by a page and a set of pages defining a sector; and a checking circuit for checking a threshold voltage of said plurality of transistors and reprogramming programmed tr
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