| http://www.w3.org/ns/prov#value | - a data bus; a storage device coupled to said data bus; and a memory controller including a buffer coupled to said data bus, wherein said buffer is configured to: drive data onto said data bus in response to detecting a first mode of operation, wherein said first mode comprises a first impedance; and receive data via said data bus in response to detecting a second mode of operation, wherein said se
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