About: http://webisa.webdatacommons.org/383682348

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	When this signal is asserted, the CPU enters a wait state and the bus controller executes the pending write commands, i.e. flushes the buffer, in the order stored in the buffer ranks until the signal is cleared.
http://www.w3.org/ns/prov#wasQuotedFrom	google.com