| http://www.w3.org/ns/prov#value | - Due to the I/O circuit is limits, the circuit initially charges the gate of the PMOS to a voltage level less than 3.3 V, such as 2.6 V. Then the voltage level of the gate would be slowly raised up to 3.3 V. The slow charging process results in a slow switching speed of the PMOS transistor.
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