About: http://webisa.webdatacommons.org/393133689

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	Delay logic 212 may include typical circuit logic and elements, such as FIFO, that cause the input signals to arrive at replicated logic block 204 later in time than the inputs will arrive at design logic block 202.
http://www.w3.org/ns/prov#wasQuotedFrom	google.com