| http://www.w3.org/ns/prov#value | - A method for biasing a source-coupled pair of MOSFET input transistors connected in a logic circuit including a transistor for controlling the bias of the input transistors and including an output source follower MOSFET transistor, the method comprising maximizing the difference between output logic high and output logic low voltages and maximizing the current supplied to the source coupled pair o
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