| http://www.w3.org/ns/prov#value | - A memory comprising: a number of access transistors, at least one access transistor including a gate coupled to a dielectric layer, the dielectric layer disposed on a body region in a substrate between a source region and a drain region,the dielectric layer containing a zirconium titanium oxide layer and a silicon nitride layer, the silicon nitride layer contacting a conductive layer of an active
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