| http://www.w3.org/ns/prov#value | - A method of enabling CPU recognition of I/O interruptions in a computer system as defined in claim 1, further comprising the steps of:masking-on the ISCs for zones having a guest in wait state, for enabling the host to alert a waiting guest which is not in a condition to handle an I/O interruption; masking-off the ISCs for zones having a guest not in wait state which are in a condition to handle a
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