| http://www.w3.org/ns/prov#value | - A method for programming non-volatile memory cells coupled in an array, comprising:providing an array a plurality of cells arranged in at least two columns and at least two rows, each cell including a substrate, a drain, a floating gate, a drain connection to an Nth or Mth word bit line (WBL), a substrate connection to an Nth or Mth word write line (WWL), and a control gate connection to an array
|
