| http://www.w3.org/ns/prov#value | - kness approx. 10 nm is deposited as an insulating film, for example by CVD, on the substrate 1, and contact holes 40 exposing the ends of the gate electrodes 7A of the drive MISFETs (DR1, DR2) and part of the drain (n+ type semiconductor region 14) are formed by successively dry etching the silicon nitride film 38, silicon oxide film 29, silicon nitride film 28, silicon oxide films 22, 21 and the
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