About: http://webisa.webdatacommons.org/422109091

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	As can be seen in FIG. 3B, a majority of the charge traps should be placed in close proximity to the channel, i.e. within 0.5 nm to 1.5 nm of the gate-dielectric/semiconductor interface, or right at the interface itself.
http://www.w3.org/ns/prov#wasQuotedFrom	google.com.au