| http://www.w3.org/ns/prov#value | - FIG. 2 shows the structure of a digital PLL, often abbreviated as DPLL. The DPLL includes a phase and frequency detector (PFD) 202, a charge pump 204, a loop filter 206, a VCO 208 for generating an oscillation signal, and a frequency divider 210 for generating a divided frequency signal having a frequency that is 1/N of the frequency of the oscillation signal, where N is an integer.
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