About: http://webisa.webdatacommons.org/434352014

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	However, some instructions such as multiply-and-add instruction VMAD and instructions that manipulate double-size vectors require data from more than two registers so that read stage 514 is longer than one clock cycle.
http://www.w3.org/ns/prov#wasQuotedFrom	google.com