About: http://webisa.webdatacommons.org/441871254

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	FIG. 5 is a timing chart of the signals in a case where the output clock signal outputted from the clock signal switching circuit 101 is switched from the first clock signal to the second clock signal.
http://www.w3.org/ns/prov#wasQuotedFrom	google.com