| http://www.w3.org/ns/prov#value | - Description of the Related Art [0004] Related art of the present invention are a technique of forming a copper (Cu) wire by a Damascene method in a large-scale integrated circuit (hereinafter abbreviated as LSI) and a technique of forming a thin film transistor (hereinafter abbreviated as TFT) that has a GOLD (acronym for gate-overlapped LDD) structure.
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