| http://www.w3.org/ns/prov#value | - A monolithic, Complex Programmable Logic Device (CPLD) for programmably implementing designs, where such designs can have parallel data or address words that are at least B bits wide, where B is an integer equal to or greater than 32, said CPLD having at least 64 I/O terminals for communicating with external circuitry, said CPLD further comprising:
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