About: http://webisa.webdatacommons.org/4689093

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	I knew latency was an issue to due the bus size difference between Rambus and Sdram or DDrRAM but I had no idea that the MCH would have to cascade latencies until they would equalize.
http://www.w3.org/ns/prov#wasQuotedFrom	hardwarecentral.com