About: http://webisa.webdatacommons.org/47823692

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	FIG. 8 is a voltage and timing diagram illustrating enable signals applied to the drain polarization circuits, and gate voltage applied to the memory cell in FIG. 3.
http://www.w3.org/ns/prov#wasQuotedFrom	google.com