| http://www.w3.org/ns/prov#value | - ctor chip in a fourth embodiment pertaining to the present invention; [0123]FIG. 16 is a cross section showing the state in which sub-chips are mounted on the semiconductor chip in FIG. 15; [0124]FIG. 17 is a cross section showing the state in which a semiconductor chip in the state in FIG. 16 is placed on a rewired substrate; and [0125]FIGS. 18a and 18 b are a cross section and a plan view illust
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