| http://www.w3.org/ns/prov#value | - A current flow path between the drain and the source of the selective NMOS transistor QS is inserted into the current flow path between the read data line DR and the drain (or the source) of the read NMOS transistor QR, and a selective word line WS is connected to the gate of the selective NMOS transistor QS. In such a configuration as above, the transistors QR, QW have a stacked structure as illu
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