| http://www.w3.org/ns/prov#value | - Accordingly, one embodiment of the present invention presents, for use in a processing device having an N-way set associative data array, a built-in self-test (BIST) circuit for testing the validity of storage locations in the data array, the BIST circuit comprising: 1) a memory capable of storing a test program executable by the processing device, wherein the test program is capable of testing th
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