| http://www.w3.org/ns/prov#value | - In such a case, this embodiment enables the firmware to learn of the stall reply from the interrupt, making it possible to invalidate the control transfer. [0177]FIG. 8B shows examples of the signal waveforms when the host receives data from the peripheral (during write transfer) In this case, the data stage is an IN transaction, as shown in C6.
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