| http://www.w3.org/ns/prov#value | - FIG. 4 is a plan view showing on an enlarged scale a through-hole 7 and its vicinity on the upper surface of the semiconductor device in FIG. 1, and FIG. 5 is a sectional view showing on an enlarged scale a joint between a terminal 8 and a solder ball 6 of the semiconductor device in FIG. 1.
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