About: http://webisa.webdatacommons.org/82045530

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	A flowchart 200, illustrating the operation of a typical simulation program using a static memory allocation algorithm and VERILOG??? HDL for simulating a hardware device, such as a memory controller, is shown in FIG. 2.
http://www.w3.org/ns/prov#wasQuotedFrom	google.es