About: http://webisa.webdatacommons.org/87654340

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	FIGS. 5A and 5B are a block diagram and a timing chart, respectively, for showing how to generate the refresh clock signal when a timer circuit is used in the semiconductor memory device of Embodiment 1 of the present invention.
http://www.w3.org/ns/prov#wasQuotedFrom	google.de