| http://www.w3.org/ns/prov#value | - A semiconductor memory according to claim 66, wherein said threshold level of each of said memory cells are placed in one of four areas including an erase area, a first storing area, a second storing area, and a third storing area to store at least four-value information in each of said memory cells, said first storing area being located between said erase area and said second storing area, and sa
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