| http://www.w3.org/ns/prov#value | - index values; FIG. 52 illustrates how the LSU of FIG. 1 is coupled with a memory system and a Memory Management Unit in accordance with one embodiment; FIGS. 53A to 53D are diagrams schematically illustrating various examples of data blocks to be accessed in accordance with an embodiment; FIGS. 54A and 54B are diagrams schematically illustrating further examples of data blocks to be accessed in a
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