| http://www.w3.org/ns/prov#value | - The reference cell transistor M11 is connected to a load circuit which supplies current thereto and which is comprised of at least one P-channel MOS transistor whose W/L ratio, where W is a channel width and L is a channel length, is larger than that of the load MOS transistor Q1 associated with the memory cell M1, or, alternatively, which is comprised of a pair of P-channel MOS transistors Q11 an
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