| http://www.w3.org/ns/prov#value | - Referring to FIG. 2D, a channel material may be coated on the gate insulating layer 14 using a process such as PVD, CVD, or ALD, and may be patterned to form a channel (or channel region) 15 on a portion of the gate insulating layer 14 corresponding to the gate 13.
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