About: http://webisa.webdatacommons.org/371199797

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	FIG. 4B is a timing diagram showing the timing sequence for sensing a low-to-high logic state transition with the sensing apparatus of the present invention shown in FIG. 5;
http://www.w3.org/ns/prov#wasQuotedFrom	google.com