| http://www.w3.org/ns/prov#value | - In some embodiments of the invention, the write set cycle uses a current of more like 2 ma with fast leading and trailing edges, such as a 3 ma current (like the reset current), a fast leading edge under 2 nsec, and a slow trailing edge between 250 nanoseconds (nsec) and preferably 2 microseconds (??s) to assure optimum writing for various material imperfections that may occur.
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