| http://www.w3.org/ns/prov#value | - FIG. 4B is a timing diagram that shows signal (voltage) levels on the various lines of CAM cell 410(1) for a particular embodiment of the present invention (e.g., FIGS. 5A and 6 described below) during standby (STBY), write (WRITE), read (READ including a pre-charge operation, PC) and comparison (CMPR including a pre-charge operation, PC) operations.
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