| http://www.w3.org/ns/prov#value | - A content-addressable memory cell, comprising:a series of n interconnected logic blocks, where n is an integer greater than one, each logic block in said series operative for performing a distinct CAM operation; a memory element operative between each serial pair of said logic blocks for storing data from one of said logic blocks in said pair, wherein multiple CAM operations are concurrently perfo
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