| http://www.w3.org/ns/prov#value | - That is, when it is judged that the transfer of data by microprocessor 601 from B bank has been completed based on the command data in polling command registers 643, then one interrupt request register is set to send an interrupt request to microprocessor 601 after the 16 words of data in B bank DPRAMB are read and transferred to RAM 512.
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