| http://www.w3.org/ns/prov#value | - On the basis of FIG. 4, the communication apparatus 1 incorporates a processor 10 connected by a bus (not shown) firstly to a read-only memory 43 in which notably the programs executed by the processor 10 are recorded and, secondly, a random access memory 44 notably including a working area, various data registers and an area reserved for storage of messages received or awaiting transmission.
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