| http://www.w3.org/ns/prov#value | - ale Ram -Channel 0IFFT Pre-512x162a002bffScale Ram -Channel 1IFFT Pre-512x162c002dffScale Ram -Channel 2IFFT Pre-512x162e002fffScale Ram -Channel 3Twiddle ROM 01Kx16300033ffTwiddle ROM 11Kx16340037ff In an embodiment, IFFT/FFT 108 is equipped with a low-power gated clock mode, which can be implemented with either an AND gate or an OR gate, for example coupled to a clock.
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