| http://www.w3.org/ns/prov#value | - In other words, the effect similar to that obtained in each of the first and second embodiments is obtained in the third embodiment by setting the condition Vread???Vsg1, Vread???Vsg2. [0079] As shown in FIG. 7, the program verify read operation is an example of the case where the voltage of the selected control gate line is positive.
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