| http://www.w3.org/ns/prov#value | - Since the input/output synchronization signal DQS and the data DQ are transferred with high speed, a small-amplitude signal interface, such as an SSTL or the like, is typically provided for the semiconductor device and the DDR SDRAM. Also, the input/output synchronization signal DQS and the data DQ are both a bidirectional signal which can be output by both the semiconductor device and the DDR SDR
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