| http://www.w3.org/ns/prov#value | - r CorporationMethod for controlling power of a microprocessor by asserting and de-asserting a control signal in response conditions associated with the microprocessor entering and exiting low power state respectivelyUS6757810 *8 Sep 200029 Jun 2004Kabushiki Kaisha ToshibaMicroprocessor including memory for storing set value used to select and executive instruction after completing exception handli
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