| http://www.w3.org/ns/prov#value | - The system of claim 14 wherein said block processing means comprises a set of N vector processors, where N is an integer, a set of N working side buffers for writing data to and reading data from said vector processors during a block operation, a set of N I/O side buffers coupled to said switching means for receiving and sending a computational block of data, and a global input port coupled to eac
|
