About: http://webisa.webdatacommons.org/36846227

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	FIGS. 6 is a circuit diagram showing a logic gate circuit for generating control signals which are input to the transfer-gates of the address-storing section of the NAND-cell type EEPROM shown in FIGS. 3A and 3B;
http://www.w3.org/ns/prov#wasQuotedFrom	google.com