| http://www.w3.org/ns/prov#value | - a node including a memory controller and a memory; N other nodes, wherein N is an integer equal to or greater than one; and an interconnect coupling the memory controller to N other memory controllers, wherein each of the N other memory controllers is included in a respective one of the N other nodes; wherein a portion of a semaphore region of the memory is associated with a shared resource access
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