| http://www.w3.org/ns/prov#value | - FIG. 2A is a block diagram of a top-level architecture for a general SDM ADC system 200 employing dynamic element matching (DEM), in accordance with a first embodiment of the invention, and FIG. 2B is a block diagram of a top-level architecture for a general SDM DAC system 240 employing DEM, in accordance with a second embodiment of the invention.
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